Aruna Jayasena is actively engaged in research focused on systems security validation and verification. With a keen interest in the intersection of Electronics Engineering (EE) and Computer Engineering (CE), Aruna specializes in hardware-firmware validation, applied cryptography, trusted execution, and side-channel analysis. Currently, he concentrates on advancing these fields through innovative projects, some of which are publicly available on his GitHub. Throughout his diverse range of projects, Aruna has developed extensive experience with various CAD tools, including Synopsys tools (VCS, DC, TMAX), Yosys Open Source EDA (Yosys, nextpnr, icestorm), Xilinx tools (Vivado, ISE), Intel Quartus, ModelSim, Icarus Verilog, symbolic verification tools (Racket + Rosette + Z3), Altium, Kicad, and Solidworks. Beyond his professional endeavors, Aruna is an avid automotive enthusiast who enjoys working on cars and drones, pushing them to their limits in the field to assess their performance. In his free time, he also indulges in activities such as swimming, kayaking, and exploring the epic world of automobiles.
Education
 | University of Florida 🇺🇸 |
 | University of Moratuwa 🇱🇰 |
Updates
- Our paper 'Information Leakage through Physical Layer Supply Voltage Coupling Vulnerability' was accepted in IEEE TVLSI! Read more...
- Our paper, 'Information Leakage Assessment of Cryptographic Instruction Set Extension Prototypes' was accepted in IEEE Transactions on Information Forensics & Security (TIFS). Kudos to my co-authors. Read more...
- I successfully defended my PhD Thesis Proposal!! Read more...
- Excited to share the acceptance of the paper, 'EvilCS: An Evaluation of Information Leakage through Context Switching on Security Enclaves' at DateConference 2024! Kudos to my co-authors Richard Bachmann and Dr. Prabhat Mishra for their contributions. Read more...
- SRC is proud to support the research of future innovators like Aruna Jayasena, a third-year Ph.D. candidate at the University of Florida! His primary area of research is on systems security validation and verification. Aruna's journey into hardware Read more...
